Joint Euro-TM/MEDIAN Workshop on
Dependable Multicore and
Transactional Memory Systems (DMTM)

Intercontinental Hotel Wien, Vienna, Austria, January 22, 2014

To be held in conjunction with:

9th International Conference on High-Performance

Embedded Architectures and Compilers - HiPEAC 2014



Call for papers

Topic of Interest

Important Dates

Venue (new)

Program (new)

Registration (new)

Submission Instructions

Program Committee

Steering Committee

Program Chair


The shift to multi-core computing has increased the relevance of parallel programming paradigms such as transactional memory. On the other hand, semiconductor technology scaling is getting close to atomic scale, causing reliability issues and making dependability a first-class design constraint. The DMTM workshop, co-organized by the COST Actions Euro-TM ( and MEDIAN (, aims to bring together these two relevant and timely topics.  While papers covering both Transactional Memory and Dependability are ideal, we welcome papers in only one of the two topics as well.


Topic of Interest

  • Hardware and software techniques to enhance dependability of multi-core systems and parallel applications
  • Transactional Memory (TM) and its applications for failure-isolation, failure-atomicity and real-time systems
  • Methodologies and tools for the development of concurrent applications for embedded systems
  • Correctness, performance, testing and debugging of TM and multi-core applications
  • Hardware, OS and language supports for TM and other programming paradigms for concurrent programming
  • Energy/reliability/performance tradeoffs
  • Fault-Tolerant micro-architectures and parallel system architectures
  • Compiler/architecture/OS methodologies and strategies for reliability
  • Error modeling, detection, correction, and tolerance for transient and permanent errors in multi-core architectures
  • Reliable on-chip communications


Important Dates

Extended Abstract submission: December 1st

Author notification: December 13th 2013

Workshop registration: December 31st 2013

Workshop event: January 22nd 2014



The meeting venue will *not* be the same as HiPEAC (5mins apart on foot). DMTM will be hosted at:

  Intercontinental Hotel Wien

  Johannesgasse 28 1030 Vienna, Austria




- 09:00 - 10:30

  • Hardware Approach for Detecting, Exposing and Tolerating High Level Atomicity Violations. Lois Orosa and João Lourenço. ( slides, abstract )
  • TM-Pure in GCC Compiler Allows Consistency Oblivious Composition. Hillel Avni and Adi Suissa. (slidesabstract )
  • Non-preemptive scheduling of real-time software transactional memory. António Barros and Luís Miguel Pinho. ( slides, abstract )
  • Exploiting Off-the-Shelf Virtual Memory Mechanisms to Boost Software Transactional Memory. Amin Mohtasham, Paulo Ferreira and João Barreto. ( slides, abstract )


- 10:30 - 11:00: Break


- 11:00 - 11:20: Presentation of the TACLe COST Action


- 11:20 - 12:50

  • Leveraging a Task-based Asynchronous Dataflow Substrate for Efficient and Scalable Resiliency. Omer Subasi, Javier Arias, Jesus Labarta, Osman Unsal and Adrian Cristal. ( slides, abstract )
  • Parallelizing Online Error Detection in Many-core Microprocessor Architectures. Manolis Kaliorakis, Mihalis Psarakis, Nikos Foutris and Dimitris Gizopoulos. (slides, abstract )
  • Dynamic Verification for Hybrid Concurrent Programming Models. Erdal Mutlu, Vladimir Gajinov, Adrian Cristal and Osman Unsal. ( slides, abstract )
  • Efficient Fault-Tolerant Adaptive Routing under an Unconstrained Set of Node and Link Failures for Many-Core Systems-on-Chip. Michael Dimopoulos, Yi Gang, Mounir Benabdenbi and Lorena Anghel.
    ( slides, abstract )



- 12:50 - 14:00: Lunch


- 14:00 - 15:30

  • The moment of truth: are we done with STM? Nuno Diegues, Paolo Romano and Luís Rodrigues. ( slides, abstract )
  • Enhancing Real-Time Behaviour of Parallel Applications using Intel TSX. Florian Haas, Stefan Metzlaff, Sebastian Weis and Theo Ungerer. ( slides, abstract )
  • Supporting Partial Data Replication in Distributed Transactional Memory. João A. Silva, Tiago M. Vale, Ricardo J. Dias, Hervé Paulino and João Lourenço. ( slides, abstract )
  • Dynamic parallel message processing with transactional memory in the actor model. Yaroslav Hayduk, Anita Sobe and Pascal Felber. ( slides, abstract )



- 15:30 - 15:50: Break


- 15:50 - 17:20

  • Analyzing the Applicability of Hardware TM to Software-Implemented Fault Tolerance. Michael Engel.
  • ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy. Oscar Palomar, Gulay Yalcin, Santhosh Kumar Rethinagiri, Adrian Cristal Kestelman, Osman Unsal and Gina Alioto. (slides, abstract)
  • Performance Sensor for Delay-Fault Detection and Correction. Jorge Semião, André Romão, Carlos Leong, Marcelino Santos, Isabel Teixeira and Paulo Teixeira.
  • Fairness vs. Linearizability in a Concurrent FIFO Queue. Mike Dodds, Andreas Haas and Christoph M. Kirsch. ( slides, abstract )



- 17:30 - 18:30: Euro-TM Management Committee Meeting


 Group Photo



This meeting is co-organized by the Euro-TM and MEDIAN COST Actions, which are supported by the European Commission. Some important notices:
- Either Euro-TM or MEDIAN can provide financial support for travel and accommodation costs (2 nights, at a flat rate of 120 EUR per night, as by COST regulations). Detailed information on eligible participants and expenses, as well as on reimbursement process can be found here (Euro-TM) and here (MEDIAN).
- COST members who attend *exclusively* DMTM will not need to register to the HiPEAC workshops or conference.

- If you intend to attend both DMTM and the HiPEAC conference, then you should register both 1) in DMTM, via email (as specified below), and 2) in the HiPEAC conference, via their website.
- COST members who attend also HiPEAC will still be entitled to reimbursement of travel and accommodation costs. However, Euro-TM and MEDIAN will not cover registration costs for the HiPEAC conference, i.e., if you intend to attend HiPEAC you will have to register regularly to the conference.
- **Registration for DMTM is mandatory but free**. To register for the workshop send an email until December 31st with your name and institution to the following addresses:
     mcouceiro <at> gsd <dot> inesc-id <dot> pt
     eurotm <at> gsd <dot> inesc-id <dot> pt

 In the email, please specify if you intend apply for financial support from Euro-TM. In this case, include also a forecast of your travel and accommodation expenses.



Submission Instructions

The workshop will consist of short presentations.  To facilitate later submission to other venues, DMTM will not have published proceedings.


Please submit a two pages maximum describing your research-in-progress at EasyChair:


Program Committee

Dr. Heiko Falk . Ulm University

Prof. Gilles Muller. LIP6

Prof. Luis Rodrigues, IST Lisbon

Dr. Marc Shapiro

Dr. Maria Michael, University of Cyprus

Dr. Marco Ottavi, University of Rome “Tor Vergata

Dr. O─čuz Ergin, TOBB University of Economics and Technology

Dr. Osman Unsal. Barcelona Supercomputing Center

Prof. Pascal Felber,University of Neuchatel

Dr. Pedro Reviriego, Universidad Antonio de Nebrija

Prof. Paolo ROmano, IST Lisbon

Dr. Ruben Titos. Chalmers University of Technology

Dr. Salvatore Pontarelli. University of Rome “Tor Vergata

Dr. Theocharis Theocharides. University of Cyprus

Dr. Sasa Tomic, IBM Zurich

Dr. Yiannakis Sazeides. University of Cyprus

Prof. Dr. Wolfgang Karl, Karlsruhe Institute of Technology (KIT)


Steering Committee

Prof. Paolo Romano, Euro-TM Action Chair, IST Lisbon, Portugal

Dr. Marc Shapiro, Euro-TM Vice Action Chair, LIP6, France

Prof. Luis Rodrigues, Euro-TM WG1 Leader, IST Lisbon, Portugal

Dr. Tim Harris, Euro-TM WG2 Leader, Oracle Labs, UK

Prof. Gilles Muller, Euro-TM WG3 Leader, LIP6, France

Prof. Wolfgang Karl, Euro-TM WG4 Leader, KIT, Germany

Prof. Pascal Felber, Euro-TM WG5 Leader, University of Neuchatel, Switzerland


Dr. Marco Ottavi MEDIAN Action Chair, University of Rome “Tor Vergata”, Italy

Prof. Lorena Anghel MEDIAN WG1 Leader Grenoble INP, TIMA Lab, France

Prof. CristianaBolchini MEDIAN WG2 Leader, Politecnico di Milano, Italy

Prof. Dimitris Gizopoulos MEDIAN WG3 Leader, University of Athens, Greece

Prof. Antonis Paschalis MEDIAN WG4 Leader, University of Athens, Greece

Prof. Oliver Bringmann MEDIAN WG5 Leader, FZI Karlsruhe, Germany

Dr. Hans Manhaeve MEDIAN WG6 Leader, Ridgetop Europe, Belgium


Program Chair

Dr. Adrián Cristal, Barcelona Supercomputing Center – Universistat Politecnica de Catalunya -